1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) and circuit architecture thereof, and more particularly, to an LCD improving power and signal supplies for source driver chips and circuit architecture thereof.
2. Description of Prior Art
With a rapid development of monitor types, novel and colorful monitors with high resolution, e.g., liquid crystal displays (LCDs), are indispensable components used in various electronic products such as monitors for notebook computers, personal digital assistants (PDAs), digital cameras, and projectors. The demands for the novel and colorful monitors have increased tremendously.
There are three ways to connect substrates and driver ICs during an LCD manufacturing process: a tape automated bonding (TAB), a chip on film (COF), and a chip on glass (COG). For the TAB and the COF technologies, driver ICs are bonded onto flexible printed circuits (FPCs) which are bonded onto glass substrates. As for the COG technology, driver ICs are directly bonded onto glass substrates.
The TAB basically consists of three layers, using polyimide (PI) as a substrate and adhesive to bond polyimide (PI) and copper foil. The inner lead bonding (ILB) adopts an eutectic bonding technology; the contact structure is protected with underfill dispensing; the outer lead bonding (OLB) adopts a package mode that glass panels are bonded with tape. Thus, the TAB is mainly applied to large-sized panels and related products.
The COF, consists of a two-layered FPC, does not have an adhesive layer as a traditional TAB does, so it is relatively thinner and softer and can offer better flexibility. Basically, the COF uses flip-chip bonding technology; that is, one or more chips, passive elements, or active elements are packaged on tapes. Driver ICs packaged with the flip-chip bonding technology will become multifunctional integrated chipsets and further, be able to reduce size.
For improving overall image quality and reducing the overall cost, a number of pins of driver ICs increases while the conductor spaces shorten. So the bonding process is the key to the whole manufacturing process for driver ICs, which implies that the bonding process takes high proportion of the total production cost. Thus, it is a critical issue to manage how to reduce the cost.
Please refer to FIG. 1. FIG. 1 is a circuit architecture diagram illustrating a panel power signal and related signals via source drivers. For a large-sized liquid crystal (LC) panel 10 adopting the COF technology, the long side of the LC panel 10 requires a printed circuit board (PCB) 12 to connect to the source driver chips 14 mounted on a thin film substrate 16. Then, an input interface 18 transmits control signals, data signals, and power signals generated by a timing controller and a power controller (not shown in FIG. 1) to each of the source driver chips 14 through control signal lines 22a and 22b, data signal lines 24a and 24b, and power signal lines 26a and 26b to activate the LC panel 10. The larger the LC panel 10 is, the larger the PCB 12 requires. However, because of limitations in the current manufacturing of PCBs 12, a traditional solution is to use several of the PCBs 12 to connect all of the source driver chips 14. In this way, the size of the LC panel 10 determines the size and numbers of the PCB 12. The larger the LC panel 10 is, the larger and the more the PCB 12 requires.